Updated 4-27-08.  Update page to reflect Revision A.
Updated 6-13-08.  Update page to reflect Revision B.
Updated 9-01-08.  Errors in parts list, now PLSLIM-PLO-1 rev C. See R24, R25.
Updated 10-25-08.  Updated for Engineering Notice, dated 10-25-08.  See paragraph "Revision B"
Updated 7-23-09.  Update page to reflect Revision C and modification to Rev B.
Updated 8-11-09.  Update information. Add release history.

SLIM-PLO-1, Phase Locked Oscillator with active loop, size-B
Use your mouse's "right click" and "Save Link" to download:
a.  SKSLIM-PLO-1.sch rev C, Schematic, in ExpressPCB software.
b.  LAYSLIM-PLO-1.pcb rev B, Component Layout, in ExpressPCB software.  Use to locate parts on board.
c.  PLSLIM-PLO-1.txt rev D, Parts List in text format.  Open with Exel or Lotus, etc.
d.  PWB-PLO.pcb rev B, Master Artwork, in ExpressPCB software.  Use to order pwb from Express.
e.  PLO1revC.pll  PLL Simulation. Open with ADIsimPLL Version 3.0
This SLIM is constructed on a common printed wiring board, the PWB-PLO.  Click to get full information on the Basic Phase Locked Oscillator.


SLIM-PLO-1
    Frequency output = 950 MHz to 2200 MHz.  PLL is LMX 2326.  The loop filter is active, using an Op Amp.  A negative suppy voltage is not required.  Dual RF outputs, +10 dBm at J2 and J3.  Phase noise at 1000 MHz is -91 dBc (1 Hz BW), 5 KHz away from carrier.
    R12 and C27 are optional.  Installed, they present a 50 ohm load to the driver.  Omitted, the PLL is high impedance CMOS logic.  For best spur rejection, they should be installed.

Release History
Original Release: Released 8-08-2007
SLIM-PLO-1 Rev 0
Schematic: SK-PLO-1 Rev 0, released 8-08-2007, archived
Pwb: PWB-PLO Rev 0, link to PWB-PLO web page
Parts List: PLSLIM-PLO-1 Rev A, archived

Revision A: Released 4-26-2008
SLIM-PLO-1 Rev A
Schematic: SKSLIM-PLO-1 Rev A, archived
Pwb: PWB-PLO Rev A, link to PWB-PLO web page
Parts List: PLSLIM-PLO-1 Rev B, not archived
1.  Rev A changes the R8-R11 VCO power divider. This adds about 10 dB more isolation between the buffer amplifiers.  However, it decreases the drive to the buffers by about 5 dB.  Therefore, Revision A also changes the attenuation resistor values, R15-R17 and R20-R22, to maintain a +7 dBm output.  The previous revision of the SLIM-PLO-1 (Rev 0), must be modified for these changes.  Exception, if it is being used only in the Basic MSA, without Tracking Generator, the mods are not necessary.
2.  Revision A changes the input ferite beads to resistors, to allow for better power supply filtering.
3.  Revision A adds R26 and R27, for better supply filtering and noise performance.
4.  Revision A removes the optional component path under U5.  This was a potential short circuit.
    The previous SLIM-PLO-1 (Rev 0), must be modified for these changes.  Exception, if U5 is operating correctly, do not remove to cut away pads.

Revision B: Released 6-11-2008
SLIM-PLO-1 Rev B,
Schematic: SKSLIM-PLO-1 Rev B, released 6-11-2008, archived
Pwb: PWB-PLO Rev A,
Parts List: PLSLIM-PLO-1 Rev C, archived
    Corrected resistor values of  R8, R10, and R11.  Should be 120 ohm.
    Changed output attenuators to 2.5 dB attenuation.  Now, both buffers will output approximately +10 dBm.
    Engineering Notice, 10-25-08.  It has been brought to my attention that in two cases (so far), the power outputs at J2 and J3 have been low.  One case is thought to be caused by low gain of the Minicircuits amplifier MMIC, ERA-33SM.  In the other case, the output power of the Minicircuits VCO, ROS-2150VW, was lower than specification.  In both cases, I recommended increasing the voltage supply at the VCO (U4 pin 14) to +6.0 volts, +/- .1volt.  This will increase the output power of the VCO by 2 to 3 dB.  There are two ways to do this:
  1.  Change the LM74L05 to a 6v or 6.2v regulator.  Replace R26 with a value of resistance to assure 6.0 volts at the VCO, U4 pin 14.  The nominal current of the VCO is about 20 ma.
  2.  Remove the voltage regulator, U5.  Reinstall U5, but do not connect it's power tab or it's pin 2 to ground.  Add two diodes in series, between U5-2 to ground.  Anode to U5-2 and cathode to ground.  Add a 1.0 ufd capacitor from U5-2 to ground.  The output of U5 will increase to about 6.2 to 6.4 volts.  Replace R26 with a value of resistance to assure 6.0 volts at the VCO, U4 pin 14.  The nominal current of the VCO is about 20 ma.

Revision C: Released 7-23-2009
SLIM-PLO-1 Rev C,
Schematic: SKSLIM-PLO-1 Rev C
Pwb: PWB-PLO Rev B
Parts List: PLSLIM-PLO-1 Rev D
    Changed the PLL Loop Filter to further supress the PLL's phase detector sidebands.  It is within specifications without this change, but it can reduce the sidebands as much as 30 dB. Previous PLO-1 Modules can be easily modified for this change (later on this page).
1.  This Revision B adds a feedback capacitor to the PLL Loop, C48.
2.  The Master Layout Artwork was also revised to accommodate the new capacitor.  However, the previous PWB's are easily modified to allow addition of C48.
3.  C1 is changed from 100 pf to 680 pf.  C48 is added, 680 pf.  R3 is changed from 1K to 470 ohms.

SKSLIM-PLO-1, Schematic of SLIM-PLO-1, Revision C