Testing the Integrated MSA,
Modularized Spectrum Analyzer

(do a browser "refresh" to make sure this is the latest update)

This Page was Started Oct. 3, 2010 If you have comments or suggestions, I will be happy to hear about them. Scotty. [wsprowls (a.t.) yahoo.com]
Updated Oct. 10, 2010 Added more information to Master Oscillator Voltage Tests
Updated Dec. 25, 2012 Changed Cavity Filter sweep test (available with MSA Software version 116)

You can link to a specific SLIM's web page by clicking on the module's paragraph header.  Here are other links supporting the MSA :
Main Page for MSA  Main page for the MSA.
Construction page for the SLIM MSA.


The purpose of this page  is to help the MSA builder test a fully integrated MSA with minimum test equipment. I have written this page with a VOM (Volt-Ohm-Meter) as the primary piece of test equipment. In some cases of troubleshooting, higher level test equipment will be required, but I will try to keep it as simple as possible.
    There are three reasons to use the procedures on this page.
1. Your MSA is functioning correctly and you just want to verify operations to get that "warm fuzzy feeling". For this, use the Verification Procedure.
2. Your MSA is not functioning within its specified capabilites.
For this, use the Verification Procedure.
3. Your MSA is not operating at all, a "Hard Failure". For this, use the Troubleshooting Guide.
For any reason, this page consists of multiple tests that will verify the operation of each SLIM within a completed MSA/TG/VNA. This page is composed of four sections.

I.  Troubleshooting Guide
    A step-by-step procedure to help find a "Hard Failure" in the MSA. A "Hard Failure" is when the MSA is not operating at all. If the MSA is not performing to its specifications, it is considered a "Soft Failure" and it is more appropriate to follow the Verification Procedure to fix the problem.
II.  Verification Procedure
    Step-by-step procedures to verify the full functionality of the MSA. If a failure is encountered in these steps, it will refer you to perform a separate test in one, or both, of the next two sections.
III.  SLIM Voltage Tests
    Step-by-step procedures to measure and verify operating voltages within each SLIM of the MSA.
IV.  Dynamic Signal Tests
    Step-by-step procedures to allow the tester to minipulate signals that verify operation of the SLIMs.

    This page is most relevant for an MSA using the "Direct Coaxial Connection" method of attaching RF cables, or for a connectorized MSA when the builder wishes to test or troubleshoot with minimal RF cable disconnections. For either, it is assumed that the MSA is completely integrated with all SLIMs and the wiring harness is completely inter-connected. Disregard testing of modules not present. If your MSA is partially integrated and is using RF connectors, refer to the page, Integration and Verification Test Procedure for the MSA.

Items Required for Testing the Integrated MSA:
1. Completely integrated Basic MSA, MSA with Tracking Generator, or MSA/VNA
2. External DC power supply or wall wart rated at a nominal +13.6v, 1000 ma.
3. Computer with LPT port, monitor, and parallel printer port cable

4. Volt-Ohm Meter (VOM, Digital or Analog). All voltage measurements are DC unless noted.
5. Optional Oscilloscope, but may be necessary for troubleshooting a faulty module.
6. Software: MSA Program in: spectrumanalyzer.tkn or spectrumanalyzer.bas
Set-Up, common for all testing on this page:
1. It is assumed that the MSA Software has been downloaded from the MSA Web Site and has been initialized. If not, go to the Web Page: MSA Set Up and Calibration. Follow the instructions for inital running of the MSA Software. You can run a ".bas" application with Liberty Basic as the main program, or a ".tkn" application without Liberty Basic.
2. Apply power (+13.6 v nominal) to the Control Board. The Control Board supplies the necessary voltages to the other SLIMs in the MSA.
3. Connect the Control Board LPT connector to the Parallel Port of the Computer.
4. Most of the tests will ask you to "Run the MSA Program". The MSA Main Graph will open and sweep with the MSA in the Spectrum Analyzer mode, 1G Band. An operational MSA will sweep with the Magnitude trace indicating the Final Crystal Filter response centered at (or near) "0 MHz".

I.  Troubleshooting Guide for the MSA
Hard Failures for Basic MSA
    A "Hard Failure" is when the MSA is not operating at all. The Magnitude trace will be flat, with no remarkable pattern, and will be at one of three levels: 0 dBm, -120 dBm, or in between 0 and -120 (probably about -100 dBm).

Set-Up for Troubleshooting a Hard Failure
1. Run the MSA Program. The MSA Main Graph will open and sweep with the MSA in the Spectrum Analyzer mode, 1 G Band, Path 1.
2.
If entering the Troubleshooting after the initial "turn-on" of a newly completed MSA, Path 1 has default calibration values: 0 bits = -120 dBm, 32767 bits = 0dBm. This is fine.
3. Video Filter to Wide.
4. If not previously done, Halt the sweep, open the Magnitude Scale Window (Axis Y2 Window), and change the Top Ref to 0 and the Bot Ref to -120. Click "OK", the Window will close.
5. Open Variables Window (under Menu, Options) to display Magdata (dBm) and magpower (bits).
6. Click "Restart".

    If the Magnitude (magpower) is a flat trace at -120 dBm or at 0 dBm (and Magdata = 65534 or 0), there is a high probability that the failure can be attributed to one of the following (in order of testing): Computer (addressing), Control Board, A to D Converter Module, and Log Detector Module (or their interconnecting wires or cables).  If the Magnitude is a flat trace (with a little noise) somewhere between -120 dBm and 0 dBm, the failure will more likely be attributed to one of the other modules (or their interconnecting wires or cables). Testing will continue in the following order: PLO 2, DDS 1, PLO 1, Master Oscillator, I.F. Amplifier, Final Crystal Filter, and Coaxial Cavity Filter.

Procedure for Troubleshooting a Hard Failure
    Test your MSA in the following order.  Once a problem is determined and fixed, the Magnitude trace should revert to a normal level. If it doesn't, continue with the procedure until it does.
Computer (hardware)
Verify your computer Status lines are pulled up via computer or Control Board. A failure here will indicate that the computer can not "listen" to the Control Board.
    a. Measure the voltage at Control Board, LPT, pin 12 and pin 13. Must be greater than + 2.0 volts.
        If it is not, you must add the pull-up resistors, R9 through R12 on the Control Board.
Computer (addressing)
Verify "Port" signals are active, to assure Computer is "talking".
    a. Measure the "Port" signal on the Control Board, using a voltmeter (Contol Board ground to LPT-2).
        This is an active TTL clock signal and measured voltages will vary. However,
        * a DC voltage reading should be between +.3 and +2.0 volts. If it is, continue at step 2.b.
        * A
0 volt reading indicates a problem with the computer or LPT cable,
            * remove the LPT cable from the computer and repeat the measurement directly on
               the Parallel Port connector (pin 2 is "Port", pin 25 is ground). If good here, but not on the
               Contol board, the LPT cable is bad.  If not good here,
            * the Port Address is incorrect for your Parallel Port interface.

                * Determine correct Parallel Port Address. Install it in the Hardware Configuration Manager.
Control Board
Verify "Control" and "Port" signals are active, to assure Control Board is "listening".
     a. Measure the "Port" signal at Control Board, P1-2 (common CLK to other modules)
        * This is an active CMOS clock signal and measured voltages will vary, however
        * a DC voltage reading should be between +.3 and +2.0 volts
        *
if it is, the computer and Control Board are operating.
        * a 0 volt reading indicates a problem with the Control Board,
            * go to the section, SLIM Voltage Tests and perform the paragraph, Control Board.
A to D Converter Module
This is the only portion of the MSA that "talks" to the computer.
a.
Go to section, SLIM Voltage Tests, and perform the paragraph, A to D Module.
b. Go to section, Dynamic Signal Tests, and perform the paragraph, A to D Converter Signal Test.
Log Detector Module
a. Go to section, SLIM Voltage Tests, and perform the paragraphLog Detector Module.
b. Go to section, Dynamic Signal Tests, and perform the paragraph, Log Detector Signal Test.
IF Amplifier Module
a. Go to section, SLIM Voltage Tests, and perform the paragraph, I.F. Amplifier Module.
b. Go to section, Dynamic Signal Tests, and perform the paragraph, I.F. Amplifier Noise Test.
Master Oscillator Module
a. Go to section, SLIM Voltage Tests, and perform the paragraphLog Detector Module.
b. Go to section, Dynamic Signal Tests, and perform the paragraph, Master Oscillator Signal Test.
PLO 2 Module
a. Go to section, SLIM Voltage Tests, and perform the paragraph, PLO 2 Module.
DDS 1 Module
a. Go to section, SLIM Voltage Tests, and perform the paragraph, DDS Module.
b. Go to section, Dynamic Signal Tests, and perform the paragraph, DDS Command Test, and
c. go to section, Dynamic Signal Tests, and perform the paragraph, DDS 1 Signal Test.
PLO 1 Module
a. Go to section, SLIM Voltage Tests, and perform the paragraph, PLO 1 Module.
Final Crystal Filter
a. Go to section, Dynamic Signal Tests, and perform the paragraph, Final Crystal Filter Test.
Coaxial Cavity Filter
a. Go to section, Dynamic Signal Tests, and perform the paragraph, Coaxial Cavity Filter Test.
DDS 3 Module (if installed)
a. Go to section, SLIM Voltage Tests, and perform the paragraph, DDS  Module.
b. Go to section, Dynamic Signal Tests, and perform the paragraph, DDS Command Test, and
c. go to section, Dynamic Signal Tests, and perform the paragraph, DDS 3 Signal Test
PLO 3 Module (if installed)
a. Go to section, SLIM Voltage Tests, and perform the paragraph, PLO 3 Module.
Phase Detector Module (if installed)
a. Go to section, SLIM Voltage Tests, and perform the paragraph, Phase Detector Module.
Soft Failures
    A "Soft Failure" is when the MSA is not performing to specification. Use the Verification Procedure.


II.  Verification Procedure
Test Sequence for Verification:
Voltage Tests
Go to the section, SLIM Voltage Tests and, for the:
1. Control Board, perform the paragraph, Control Board.
2. Analog to Digital Converter, perform the paragraph, A to D Module.
3. Log Detector, perform the paragraph, Log Detector Module.
4. Master Oscillator, perform the paragraph, Master Oscillator.
5. I.F. Amplifier, perform the paragraph, I.F. Amplifier Module.
6. DDS 1, perform the paragraph, DDS Module.
7. PLO 2, perform the paragraph, PLO 2 Module.
8. PLO 1, perform the paragraph, PLO 1 Module.
9. DDS 3, perform the paragraph, DDS Module, (if installed)
10. PLO 3, perform the paragraph, PLO 3 Module, (if installed)
11. Phase Detector, perform the paragraph, Phase Detector Module, (if installed)
Performance Tests
12. Perform the "Zero" Frequency Sweep Test. Compare the data of your MSA to the data given in the test procedure to determine the performance of your MSA.
    a. During this test, determine
if the L.O. power at Mixer 2 is adequite:
       * In Mixer 2, short over the attenuation resistor, R5. This increases the LO power by 1.3 dB.
       * If the final Magnitude measurement increases by more than .5 dB, the mixer is "starved" and
          steps should be taken to increase the RF power at Mixer 2, J1.
13. Perform the DDS 1 Generator Test. This is a good indication of the measurement accuracy of the Spectrum Analyzer at 10.7 MHz.
    a. During this test, determine if the L.O. power at Mixer 1 is adequite:
       * In Mixer 1, short over the attenuation resistor, R5. This increases the LO power by 1.3 dB.
       * If the final Magnitude measurement increases by more than .5 dB, the mixer is "starved" and
          steps should be taken to increase the RF power at Mixer 1, J1.
14. Perform the I.F. Amplifier Signal Test.
15. If your Final Crystal Filter is removable, perform the Optional Coaxial Cavity Filter Test. This test will indicate the general "health" of the Coaxial Cavity Filter.
16. For the MSA with Tracking Generator, perform the
MSA Frequency Range Test.

Block Diagram for the MSA/VNA
slim/bdmsa_tg_vna.gif
    The block diagram shows typical power levels, but not all due to the builder's preference of internal attenuators. Listed here are measured values from the Verification SLIM MSA:
    a. Gains = +40 dB (I.F. Amplifier)
    b. Losses:
       * Mixer 1 conversion loss = -6.5 dB, with - 4.7 dB of attenuator at J2 = -11.2 dB
       * L to R port isolation of Mixer 1 = -35 dB, +/- 10.0 dB
       * Coaxial Cavity Filter insertion loss = -5.3 dB
       * Mixer 2 conversion loss = -6.5 dB

       * Path 1 Resolution Filter insertion loss = -4 dB, +/- 1.0 dB
       * Mixer 3 conversion loss = -6.5 dB, with - 14 dB of attenuator at J3 = -20.5 dB
       * Mixer 4 conversion loss = -6.5 dB, with - 14 dB of attenuator at J3 = -20.5 dB
    c. Total gain of Spectrum Analyzer chain, from MSA input to Log Detector input = +13.0 dB
    d. Tracking Generator output power = -10.5 dBm, at 100 MHz.

Wiring Diagram for the MSA/VNA
slim/wdmsa_tg_vna.gif

III.  SLIM Voltage Tests
   
The following Test Paragraphs are voltage measurements within each SLIM. Voltages that are out of tolerance will usually indicate a problem within that module. Click the paragraph header to link to the SLIM's web page.

Control Board
    The Control Board contains all of the interfacing between the computer and the individual SLIM modules.  It also contains the voltage regulation needed for the other modules. The Control Board requires +12 volts to +18 volts DC at 1 amp of peak current. For full MSA operation, the Control Board will use and pass on about 750 ma.

skslim_cb_nv1.gif
   This is the latest schematic of the MSA Control Board. If your Control Board is an earlier version, you will want to test if pull-up resistors are required for your computer. Most home computers do not need them.
Test Procedure:
1. Measure the voltage at these locations, as indicated in the schematic:
 a. SELECT and PE. The voltage should read a minimum of 2.0 volts, maximum of 5.0 volts. If you read less than the minimum voltage, remove power, disconnect from the computer and add the pull-up resistors, R9-R12.
 b. WAIT and ACK. The voltage should read either a "zero" or "one". A "zero" is 0 volts +.2v. A "one" should read a minimum of 2.0 volts, a maximum of 5.0 volts. If you read less than the minimum voltage, remove power, disconnect from the computer and add the pull-up resistors, R9-R12.
slim/skslim_cb_nv2.gif
2. Measure the input voltage to the Control Board at U5-1. Range: +12.0 v to +18 v.
3. Measure the output of the +10 volt regulator, U5-3. It should be +10.0 volts, +/- 0.2 volts.
4. Measure the output of the +5 volt regulator, U6-1.
It should be +5.0 volts, +/- 0.2 volts.
5. LED 1 should be lit.
slim/skslim_cb_nv3.gif
6. Measure the output of the +20 volt multiplier at P23-2 and P24-2. It should be +18.94 volts +/- .3 volts.
7. If you have an oscilloscope, measure the peak to peak ripple
at P23-2 or P24-2. It should be less than 20.0 millivolts.  When the MSA is completed, excessive ripple will be seen as side bands on every signal when in the Spectrum Analyzer Mode. A cure is too add more capacitance at C20, C21, C23, C24, and C25.
8. If C15 is installed, measure the -10 volt multiplier at P23-3 and P24-3. It should be -10.0 volts, +/- 0.3 volts. The -10 volts is not used in the SLIM MSA, but can be utilized for external experiments requiring current less than 20 ma.

AtoD Module
The following is written for the SLIM-ADC-16. The procedure is the same when using the SLIM-ADC-12.
    This test depends on the following other modules connected and operating correctly: Control Board
slim/skslim_adc_16.gif
   
This schematic shows the U1 regulator installed. This is the case for the Basic MSA. For the VNA, it may be ommitted and there must be a jumper wire from the pwb pads of U1-3 to U1-1. Power is supplied from the PDM module's J2-1 and J2-2 to the AtoD module's J1-1 and J1-2. The name "+10v" should be changed to "+5v". Make certain that the PDM module has its ferrite jumpers installed (FBx and FB2).
Test Procedure
1. For the Basic MSA, verify the voltage at U1-3 is +10 volts, +/- .2 volts. For the VNA (no U1) verify the voltage is +5.0 volts, +/- .1 volts.
2. Measure the +5 volts at U1-1, U2-1, U2-2, U2-9, U2-10. It should be +5.0 volts, +/- .1 volts.
3.
Measure the +5 volts at U3-1, U3-2, U3-9, U3-10 (if U3 if installed). It should be +5.0 volts, +/- .1 volts. U3 may not be installed for the Basic MSA version.
4. Halt the sweep.
5. Measure the voltage at U2-3. This is the Magnitude output voltage of the Log Detector Module. Its voltage level depends entirely upon the amount of RF power applied to J1 of the Log Detector Module. The voltage should read between +.3 volts and +2.5 volts. A 0 volts reading might indicate a short or low resistance path to ground. A much higher voltage
might indicate a short or low resistance path to +5v. If so, inspect for shorts or cleanliness.
6. The voltage at U3-3, if installed, is the Phase output voltage of the Phase Detector Module. Its voltage level is relevant only during a normal VNA set-up condition. However, a 0 volts reading might indicate a short or low resistance path to ground. A +5 volts reading might indicate a short or low resistance path to +5v. If so, inspect for shorts or cleanliness. This voltage will be more critically tested in a later paragraph.

Log Detector Module
   The Log Detector Module, SLIM-LD-8306, converts RF power to voltage in a logarithmic function. The bandwidth of the module is 2 MHz to 160 MHz, although the input will be 10.7 MHz in the MSA.
    The J2 output is the Magnitude voltage output which goes to the AtoD Module. Its J1 input dynamic range is from approximately -90 dBm to +10 dBm, although this range might be extended. Its J2 output voltage over this range is approximately .35 volts to 2.35 volts.
    The J3 output is an RF Limited output of the input frequency. It supplies the Signal Input to the PDM Module (VNA only). The module does not require any direct commands from the computer, and it can be partially tested with only a voltmeter.
    This test depends on the following other modules connected and operating correctly:
Control Board, A to D Module
slim/skslim_ld_8306.gif
    *Note: You may modify the Log Detector Module for AC coupled input by cutting the trace between J1 and the input to transformer T1 and adding a series capacitor (.1 ufd). You may leave the capacitor in place without affecting the characteristics of the Log Detector.

Test Procedure:
1. Verify the voltage at U1-3 is +10 volts, +/- .2 volts.
2. Measure the +5 volts at U1-1. It should be +5.0 volts, +/- .1 volts.
3. Measure the +5 volts at U2-2 and U2-8. It should be about 92 millivolts less than the voltage measured at U1-1.
4.
Measure the +5 volts at U2-15. It should be about 64 millivolts less than the voltage measured at U1-1.
5. Measure the voltage at U2-9.
It should be +.41 volts, +/- .05 volts if R6 is 390 ohms.
6. Measure the voltage at U2-12 and U2-13. They should be about 25 millivolts less than the voltage measured at U1-1. This is the Limited I.F. output and can be observed with an optional 20 MHz o'scope. With no input signal to the Log Detector, either pin should be about 60 mv peak to peak noise. If a signal is input to the Log Detector, either pin should be about 60 mv peak to peak square wave.  If the PDM is connected to J3 of the Log Detector Module, the peak to peak value at U2-12 will be one half that, or 30 mv pp.
7. Measure the voltage at U2-16 and J2. This is the Magnitude output voltage of the Log Detector Module. Its voltage level depends entirely upon the amount of RF power applied to J1 of the Log Detector Module. The voltage should read between +.3 volts and +2.5 volts. A 0 volts reading might indicate a short or low resistance path to ground. A much higher voltage might indicate a short or low resistance path to +5v. If so, inspect for shorts or cleanliness.
 

Master Oscillator Module
    The Master Oscillator Module, SLIM-MO-64, incorporates a 64 MHz crystal oscillator and 3 buffers for distribution to the other SLIMs.  This section will test the MO for basic operation but not for frequency accuracy.
    This test depends on the following other modules connected and operating correctly: Control Board
slim/skslim_mo_64.gif
Test Procedure:
1. Verify the voltage at P1-1 is +10 volts, +/- .2 volts. The voltage at U1-1 should read about .5 volts lower than the voltage at P1-1, indicating total module current is about 50 ma.
2. Measure the +5 volts at U1-3 and U2-4. It should be +5.0 volts, +/- .1 volts.
3. Measure the voltage at U3-5. It should read about 75 mv less than U1-3.
4. Measure the voltage at U4-5, U5-5, and U6-5.  Each should read about 150 mv less than U1-3 (+/- 50mv), driving a 50 ohm load. With no load, one should read about 75 mv less than U1-3(+/- 20mv).
5. Use an axial lead, 10 K ohm resistor and wrap one lead around your voltmeter probe. This will be used in the following steps to measure an average voltage. The resistor is to keep the voltmeter a high impedance load to the circuit points to be tested. A voltage reading of +2.5 volts indicates that the output has a full 5 volt peak to peak signal, although this is not an absolute verification. However, if a 0 volt or +5 volts is measured, this does indicate a failure. Measure the following points:
    a. J1 and U4-4
    b. J2 and U5-4
    c. J3 and U6-4
    d. U3-4, U4-2, U5-2, and U6-2
    e. U2-3 and U3-2

DDS Module
The DDS 1 Module, SLIM-DDS-107, is the fine frequency "steering" source for PLO 1 in the MSA.  The 64 MHz Master Oscillator supplies the clock signal required by the AD9850 DDS I.C. There are 2 outputs from the DDS, but only one is required for MSA operation. DDS 3 is identical to DDS 1.
    This test depends on the following other modules connected and operating correctly:
Control Board, Master Oscillator Module
DDS Module Schematic, click to enlarge.
slim/skslim_dds_107.gif
   The SLIM-DDS-107 is designed and configured with a filter and squaring circuit in the DDS A path.  The filter (XF1) is 10.7 MHz with a 15 KHz bandwidth.  The squaring circuit of U3 will output a CMOS level, capable of driving a 50 ohm line (J4). L3/C35 comprise a low pass filter to attenuate harmonics, which have been found to affect MSA spurious. J2 is not used and should not have a connector.  J3 output (the Spare) is an unfiltered output of the DDS B and will contain all harmonics and aliases of a normal DDS output.  Its output power level is approximately -8 dBm.

Test Procedure:
1.  Verify the MSA is sweeping.
2.  Verify the voltage at P1-2 is +10 volts, +/- .2 volts. The voltage at U1-1 should be about .62 volts lower, indicating a current draw of 62 ma.
3. Measure the +5 volts at U1-3, U2-6, U2-11, U2-18, and U2-23. It should be +5.0 volts, +/- .1 volts.
4. Measure the voltage at U3-5. It should be 30 mv lower than the 5 volts measured at U1-3. This verifies current for U3 is 3 ma. If the voltage is lower (indicating higher current), U2 may not be correctly commanded to the proper frequency.
5. Measure the voltage at U3-2. It should be +2.5 volts, +/- .1 volts.
6. Measure the voltage at U2-3 and U2-4.
It should be +5.0 volts, +/- .1 volts.
7. Measure the voltage at U2-1, U2-2, U2-26, U2-27 and U2-28. It should be 0 volts.
8. Measure the voltage at U2-12.
It should be +1.248 volts, +/- .01 volts.
    *
A correct voltage here does not assure that DDS 1 is fully operational. However, an error here
    does indicate a problem.

9. Repeat the previous steps for DDS 3, if incorporated into the MSA. Its voltages should be identical to DDS 1.

PLO 2 Module
    The PLO 2 Module, SLIM-PLO-2, is the fixed LO frequency source for the 2nd converter in the spectrum analyzer circuit of the MSA. It is also the fixed frequency source for the Tracking Generator circuit of the MSA. This paragraph will test the basic operation of the PLO 2. Subsequent test paragraphs will verify its output power and frequency stability.
    This test depends on the following other modules connected and operating correctly:
Control Board, Master Oscillator Module
    This schematic is "scrunched" on the web page. Click on it to open in full view.
slim/skslim_plo_2.gif

Test Procedure:
1.  If the MSA is sweeping, Halt the sweep.
2. Measure and verify the voltage at these locations. Record them on your schematic.
 a. P1-2 =  +10 volts, +/- .2 volt.
 b. U1-3 = 250 mv lower than P1-2.
 c. Current = (voltage at a. - voltage at b.)/10 ohms =  25 ma., +/- 5 ma.
 d. U2-7, U2-10, U2-15, U2-16 = +5.0 volts, +/-.1 volt
 e. VCO supply voltage, U4-14 = +9.5 volts, +/-.2 volt (schematic voltage may not be correct)
 
f. VCO Current = (voltage at b. - voltage at e.)/10 ohms =  19 ma., +/- 5 ma.
 g. FB6 / R13 =  +10 volts, +/- .1 volt.
 h. R14 / L1 =
+4.12 volts, +/- .2 volt.
 i. U7 Current
= (voltage at g. - voltage at h.)/150 ohms =  39 ma., +/- 5 ma.
 j. R19 / L2 = +4.12 volts, +/- .2 volt.
 k. U8 Current
= (voltage at g. - voltage at j.)/150 ohms =  39 ma., +/- 5 ma.
 l. VCO Control Voltage, U4-2 = +3.2 volts,
+/- .5 volt. If this voltage is +5 volts or 0 volts, it would indicate that PLO 2 is not locked.
    * A high voltage suggests that U2-6 is not getting a feedback frequency from the VCO.
    * A low voltage suggests that U2-8 is not getting a reference from the Master Oscillator Module.
    * A command error from the Control Board may cause either high or low voltage.


PLO 1 Module
    The PLO 1 Module, SLIM-PLO-1, is the variable frequency LO source for the 1st converter in the spectrum analyzer circuit of the MSA. It is also the variable frequency source for the VNA Phase circuit of the MSA. This paragraph will test the basic operation of the PLO 1. Subsequent test paragraphs will verify its output power and frequency stability. PLO 3 is identical to the PLO 1 Module.
    This test depends on the following other modules connected and operating correctly:
Control Board, Master Oscillator Module, DDS 1 Module
    This schematic is "scrunched" on the web page. Click on it to open in full view.
slim/skslim_plo_1.gif

Test Procedure:
1.  If the MSA is sweeping, Halt the sweep.
2. Measure and verify the voltage at these locations. Record them on your schematic.
 a. P1-2 / R28 =  +10 volts, +/- .2 volt.
 b. U1-3 and U5-3 = +9.70 volts, +/- .2 volt.
 c. Current = (voltage at a. - voltage at b.)/10 ohms =  30 ma., +/- 5 ma.
 d. U2-7, U2-10, U2-15, U2-16 = +5.0 volts, +/-.1 volt
 e. U5-1 =
+5.0 volts, +/-.1 volt
 f. VCO supply voltage, U4-14 = +4.8 volts, +/-.1 volt
 
g. VCO Current = (voltage at e. - voltage at f.)/10 ohms =  19 ma., +/- 5 ma.
 h. 20 volt supply, P1-6 / R27 = +19.0
volts, +/-.2 volt
 i. U3 supply voltage, U3-7 = +18.94 volts, +/-.2 volt. If you have an optional oscilloscope, the peak to peak ripple at U3-7 should be less than 2 millivolts. The ripple frequency is between 8 KHz and 15 KHz.
 j. U3 Current
= (voltage at h. - voltage at i.)/24.9 ohms =  3 ma., +/- 1 ma.
 k. Bias voltage, U3-3
= +2.5 volts, +/-.2 volt.
 l. Loop Balance voltage, U3-2 = exactly the same as U3-3. Any error may indicate an unlocked condition. Your DVM must be high impedance (>1 Meg Ohms) for correct results.
 m. VCO Control Voltage at U4-2 = +2.55 volts, +/- .5 volt. If this voltage is +19 volts or 0 volts, it would indicate that the PLL is definitely, not locked.
    * A high voltage suggests that U2-6 is not getting a feedback frequency from the VCO.
    * A low voltage suggests that U2-8 is not getting a steering frequency from the DDS 1.
    * A command error from the Control Board may cause either high or low voltage.
 n. FB6 / R13 =  +10 volts, +/- .1 volt.
 o. R14 / L1 =
+4.12 volts, +/- .2 volt.
 p. U7 Current
= (voltage at g. - voltage at h.)/150 ohms =  39 ma., +/- 5 ma.
 q. R19 / L2 = +4.12 volts, +/- .2 volt.
 r. U8 Current
= (voltage at g. - voltage at j.)/150 ohms =  39 ma., +/- 5 ma.

PLO 3 Module
    The PLO 3 Module is the variable frequency LO source for the converter in the Tracking Generator circuit of the MSA. It is also the variable frequency source for the VNA Phase circuit of the MSA. The PLO 3 Module is identical to the PLO 1 Module and share a common part number, SLIM-PLO-1. PLO 3 is tested the same way as PLO 1. Use the procedure and expected results in the previous paragraph. The results are identical, with one exception. Since PLO 3 is commanded to 1034 MHz, the VCO Control Voltage at U4-2 will be +1.5 volts, +/- .5 volt.

Test Procedure:
1.  If the MSA is sweeping, Halt the sweep.
2. Measure and verify the voltage at these locations. Record them on your schematic.
 a. P1-2 / R28 =  +10 volts, +/- .2 volt.
 b. U1-3 and U5-3 = +9.70 volts, +/- .2 volt.
 c. Current = (voltage at a. - voltage at b.)/10 ohms =  30 ma., +/- 5 ma.
 d. U2-7, U2-10, U2-15, U2-16 = +5.0 volts, +/-.1 volt
 e. U5-1 =
+5.0 volts, +/-.1 volt
 f. VCO supply voltage, U4-14 = +4.8 volts, +/-.1 volt
 
g. VCO Current = (voltage at e. - voltage at f.)/10 ohms =  19 ma., +/- 5 ma.
 h. 20 volt supply, P1-6 / R27 = +19.0
volts, +/-.2 volt
 i. U3 supply voltage, U3-7 = +18.94 volts, +/-.2 volt. If you have an optional oscilloscope, the peak to peak ripple at U3-7 should be less than 2 millivolts. The ripple frequency is between 8 KHz and 15 KHz.
 j. U3 Current
= (voltage at h. - voltage at i.)/24.9 ohms =  3 ma., +/- 1 ma.
 k. Bias voltage, U3-3
= +2.5 volts, +/-.2 volt.
 l. Loop Balance voltage, U3-2 = exactly the same as U3-3. Any error may indicate an unlocked condition. Your DVM must be high impedance (>1 Meg Ohms) for correct results.
 m. VCO Control Voltage at U4-2 = +2.90 volts, +/- .5 volt. If this voltage is +19 volts or 0 volts, it would indicate that the PLL is definitely, not locked. Notice the voltage is about .17 volts higher than what was measured during the PLO 1 test. This is due to the difference in frequencies.
 n. FB6 / R13 =  +10 volts, +/- .1 volt.
 o. R14 / L1 =
+4.12 volts, +/- .2 volt.
 p. U7 Current
= (voltage at g. - voltage at h.)/150 ohms =  39 ma., +/- 5 ma.
 q. R19 / L2 = +4.12 volts, +/- .2 volt.
 r. U8 Current
= (voltage at g. - voltage at j.)/150 ohms =  39 ma., +/- 5 ma.

Phase Detector Module
    The main purpose of this paragraph is to test the operation of the Phase Detector Module, SLIM-PDM. Basic MSA users may skip this paragraph.
    This test depends on all other modules connected and operating correctly:

slim/skslim_pdm.gif
Test Procedure:
1. Run the MSA Program. The MSA Main Graph will open and sweep with the MSA in the Spectrum Analyzer mode.
2. Halt the Sweep. Connect a coaxial test cable from the Tracking Generator output to the MSA input.
3. Change Mode to VNA-Transmission Mode.
4. Halt the Sweep
5. Open the Sweep Parameters Window and change:
  a. Center Frequency to 300 (MHz)
  b. Span to 100 (MHz)
  c. Wait to 50
6. Click "OK" to close
Sweep Parameters Window.
7. Click "Restart".
8. The Magnitude trace should be about -11 dBm, +/- 2 dB.
9. Measure and verify the voltage at these locations. Record them on your schematic.
 a. P1-2 / R11 =  +10 volts, +/- .2 volt.
 b. U1-3 = +9.50 volts, +/- .2 volt.
 c. Current = (voltage at a. - voltage at b.)/10 ohms =  50 ma., +/- 5 ma.
 d. U5-2, U5-7, U5-8, U2-5, U6-5 = +5.0 volts, +/-.1 volt
 e. U3-5, U7-5 =
25 mv less that measured at step d, +/- 5 mv.
 f. U4-5 = 15 mv less that measured at step d, +/- 2 mv.
 g. U9-2, U9-7, U9-8 = 18 mv less that measured at step d, +/- 2 mv.
 h. U8-2, U8-7, U8-8 = 18 mv less that measured at step d, +/- 2 mv.
 i. U2-1, U6-1 =
+2.50 volts, +/- .1 volt.
10. If you have an optional oscilloscope with at least a 20 MHz bandwidth, measure:
 a. J1 = 200 mv peak to peak, +/- 50 mv
 b. J2 = 40 mv peak to peak, +/- 10 mv

IF Amplifier Module
    The IF Amplifier Module, SLIM-IFA-33, consists of two separate 20 dB amplifiers that share a common pwb and supply voltage.  Each amplifier has a low pass filter in its output with a high cut-off frequency of approximately 40 MHz. The low frequency cut-off is about 2 MHz.
    This test depends on the following other modules connected and operating correctly: Control Board
slim/skslim_ifa_33.gif
Test Procedure:
1. Measure the voltage at:
 a. P1-2, FB1 / R1 =  +10 volts, +/- .2 volt.
 b. R2 / L1 =
+4.12 volts, +/- .2 volt.
 c. U1 Current
= (voltage at a. - voltage at b.)/150 ohms =  39 ma., +/- 5 ma.
 d. R4 / L2 = +4.12 volts, +/- .2 volt.
 e. U2 Current
= (voltage at a. - voltage at d.)/150 ohms =  39 ma., +/- 5 ma.

IV.  Dynamic Signal Tests
    These tests will provide a general indication that the modules are operating correctly. Inter-connecting cables do not need to be removed for these tests. The tests are not expected to provide precise data, but the specified coarse values will indicate go or no-go conditions. The success of each of the following Module Tests is dependent on the correct operation of other modules.

A to D Converter Signal Test
For this test, the following other modules must be operating correctly:
Control Board
1.
Halt sweep. Disconnect the LPT cable from the MSA.
2. Remove power to MSA.
3. Allow about 10 seconds for the circuits to discharge.
4. Apply power to the MSA. Connect the LPT cable to the MSA
5. Click "Continue" (not Restart).
    a.  The MSA will sweep without "brains", but the AtoD Converter data will be valid.
6. Connect 10 K resistor from J1 to +5v. Trace should rise. Magnitude Bit count should increase.
7. Connect 10 K resistor from J1 to ground. Trace should lower. Magnitude Bit count should decrease.
8. Short J1 to ground. Magnitude Bit count should be 0.
9. Short J2 to ground. Phase Bit count should be 0.
10. Halt the sweep.
11. Click "Restart".


Log Detector Signal Test
For this test, the following other modules must be operating correctly:
Control Board, A to D Module
1. Halt sweep. Disconnect the LPT cable from the MSA.
2. Remove power to MSA.
3. Allow about 10 seconds for the circuits to discharge.
4. Apply power to the MSA. Connect the LPT cable to the MSA
5. Click "Continue" (not Restart).
    a. The MSA will sweep without "brains", but the Log Detector and AtoD Converter data will be valid.
6. Measure J2 of the Log Detector Module (and J1 of AtoD Converter)
    a.The DC voltage should read +.35 volts, +/- .1 volts.
    b. the Magnitude trace should be at approximately -100 dBm, +/- 5 dBm,
    c. the magpower should be about -100 (dBm), and
    d. magdata = 4800 (bits), +/- 1000, and
    e. it would indicate that the Log Detector and A to D Converter are operating normally
7.
If the Magnitude trace is less than -105 dBm, it may indicate a problem with the Log Detector.
8. If the Magnitude trace is greater than -95 dBm, it may indicate a problem with the A to D Module.
9. Hold a metal pin and touch the J1 input of the Log Detector,
    a. your body should cause a noise increase, and
    b. the Magnitude trace and the magdata bits should increase.
    c. A failure here indicates a problem within the Log Detector Module.
10. Halt the sweep.
11. Click "Restart".


Master Oscillator Signal Test
For this test, the following other modules must be operating correctly:
Control Board, A to D Module, Log Detector Module
This test will verify Master Oscillator power levels, but not frequency.
This test uses Master Oscillator points as signal sources and the Log Detector as a detector.
1.
Make a length of wire with a 10 K ohm resistor in series.
2. Halt sweep.
3.
Disconnect the LPT cable from the MSA.
4. Remove power to MSA.
5. Allow about 10 seconds for the circuits to discharge.
6. Apply power to the MSA.
7.
Connect the LPT cable to the MSA
8. Click "Continue" (not Restart).
    a. The MSA will sweep without "brains", but the Log Detector and AtoD Converter data will be valid.
9. Use the wire to jumper J1 of Master Oscillator Module to J1 of Log Detector Module.
    a.
The Magnitude trace should increase.
    b.
Use the wire to jumper J1 of DDS 1 Module to J1 of Log Detector Module.
    c. T
he Magnitude trace should be the same as in step a.
10. Use the wire to jumper J2 of Master Oscillator Module to J1 of Log Detector Module.
    a.
The Magnitude trace should increase.
    b. Use the wire to jumper J1 of PLO 2 Module to J1 of Log Detector Module.
    c. T
he Magnitude trace should be the same as in step a.
11. Use the wire to jumper J3 of Master Oscillator Module to J1 of Log Detector Module.
    a.
The Magnitude trace should increase.
    b. Use the wire to jumper J1 of DDS 3 Module (if installed) to J1 of Log Detector Module.
    c. T
he Magnitude trace should be the same as in step a.
12. If the previous three steps fail,
    a. Use the wire to jumper U3-4 of Master Oscillator Module to J1 of Log Detector Module.
    b. The Magnitude trace should increase.
    c. This verifies U3 is operational
13. If the previous step fails,
    a. Use the wire to jumper U2-3 of Master Oscillator Module to J1 of Log Detector Module.
    b. The Magnitude trace should increase.
    c. This verifies the oscillator, U2 is operational
14. Halt the sweep.
15. Click "Restart".


DDS Command Test (used for DDS 1 or DDS 3)
For this test, the following other modules must be operating correctly:
Control Board, Master Oscillator Module
1. Halt the Sweep
2. Open the Special Tests Window by accessing the menu item, "Setup".
3. In the
Special Tests Window, enter .0000001 into the "Command DDS 1" Box.
    * for DDS 3,
enter .0000001 into the "Command DDS 3" Box.
4. Click the "Command DDS 1" Button.
    * for DDS 3,
click the "Command DDS 3" Button.
5. Measure the DC voltage at U2-21.
6. Voltage will cycle from 0 volts to .5 volts, back to 0 volts, every 10 seconds.
7. This verifies that DDS is receiving a correct command.
8. It also verifies the Master Clock is driving the DDS Module correctly.
9. Close the
Special Tests Window
10. Click "Restart"


DDS 1 Signal Test
For this test, the following other modules must be operating correctly:
Control Board, A to D Module, Log Detector Module, Master Oscillator Module
1. Make a length of wire with a 10 K ohm resistor in series.
2. Use the wire and couple J1 of DDS 1 to J1 of Log Detector.
    a. The Magnitude trace should increase.
    b. This DDS clock is the 64 MHz coming from the Master Oscillator.

3. Halt the sweep
4. Open Sweep Parameters Window and change:
     a. Center frequency to the center frequency of the DDS 1 Crystal Filter (10.7 MHz)
     b. Span to 10 times the bandwidth of
the DDS 1 Crystal Filter (.15)
     c. Click "OK" to close window
5. Click "Restart"
6. Click "Halt"
7. Open Special Tests Window using Menu item, "Setup"
8. Click the "DDS 1 Sweep" button. Do not close Special Tests Window
9. Click "Continue", not "Restart".
10. Use the wire and couple J3 of DDS 1 to J1 of Log Detector.
    a. The Magnitude trace should increase.
11. Use the wire and couple J4 of DDS 1 to J1 of Log Detector.
    a. The Magnitude trace should represent the output of the DDS squaring circuit.
    b. The center of the response should be in the center of the graph.
        If it is not, the DDS Crystal Filter circuit may not be well matched, or
        the DDS Crystal is not the frequency you thought it was.
    c. Determine the center of the response (center of the 3 dB edges).
       * Use this frequency value in the Hardware Configuration Manager, DDS Center Frequency.
12. Close the Special Tests Window
13. Open Sweep Parameters Window and change:
     a. Center frequency to 0 (MHz)
     b. Span to 10 times the bandwidth of
your Final Crystal Filter
     c. Click "OK" to close window
14. Click "Restart". This is the same configuration as when entering this test.

DDS 3 Signal Test
For this test, the following other modules must be operating correctly:
Control Board, A to D Module, Log Detector Module, Master Oscillator Module
1. Make a length of wire with a 10 K ohm resistor in series.
2. Use the wire and couple J1 of DDS 3 to J1 of Log Detector.
    a. The Magnitude trace should increase.
    b. This DDS clock is the 64 MHz coming from the Master Oscillator.

3. Halt the sweep
4. Open Sweep Parameters Window and change:
     a. Center frequency to the center frequency of the DDS 3 Crystal Filter (10.7 MHz)
     b. Span to 10 times the bandwidth of
the DDS 3 Crystal Filter (.15)
     c. Click "OK" to close window
5. Click "Restart"
6. Click "Halt"
7. Open Special Tests Window using Menu item, "Setup"
8. Click the "DDS 3 Track" button. Do not close Special Tests Window
9. Click "Continue", not "Restart".
10. Use the wire and couple J3 of DDS 3 to J1 of Log Detector.
    a. The Magnitude trace should increase.
11. Use the wire and couple J4 of DDS 3 to J1 of Log Detector.
    a. The Magnitude trace should represent the output of the DDS squaring circuit.
    b. The center of the response should be in the center of the graph.
        If it is not, the DDS Crystal Filter circuit may not be well matched, or
        the DDS Crystal is not the frequency you thought it was.
    c. Determine the center of the response (center of the 3 dB edges).
       * Use this frequency value in the Hardware Configuration Manager, DDS Center Frequency.
12. Close the Special Tests Window
13. Open Sweep Parameters Window and change:
     a. Center frequency to 0 (MHz)
     b. Span to 10 times the bandwidth of
your Final Crystal Filter
     c. Click "OK" to close window
14. Click "Restart". This is the same configuration as when entering this test.

Final Crystal Filter Test (Path Test)
For this test, the following other modules must be operating correctly:
Control Board, A to D Module, Log Detector Module, Master Oscillator Module, DDS 1 Module
This test uses DDS 1 as a sweeping signal source.
1. Make a length of wire with a 10 K ohm resistor in series.
2. Halt the sweep
3. Open Sweep Parameters Window and change:
    a. Center frequency to the center frequency of your Final Crystal Filter (10.7 MHz)
    b. Click "OK" to close window
4. Click "Restart"
5. Click "Halt"
6. Open Special Tests Window using Menu item, "Setup"
7. In Special Tests Window, click the "DDS 1 Sweep" button. Do not close Special Tests Window
8. Click "Continue", not "Restart".
9. Use the wire and couple J3 of DDS 1 to Final Xtal Filter at IF Amp, J2.
    a. the Magnitude trace and the magdata bits should increase dramatically.
    b. Trace should be the response of your Final Crystal Filter, centered in the center of the Graph.
    c. A minor, or no increase, or off frequency response would indicate a problem with the Filter.
10.
Open Sweep Parameters Window and change:
    a. Center frequency to 0 (MHz)
    b. Click "OK" to close window
11. Click "Restart"

I.F. Amplifier Noise Test (assumption: J3 is input, J4 connected to J1, and J2 is output)
For this test, the following other modules must be operating correctly:
Control Board, A to D Module, Log Detector Module
This will test the broad band noise output of the I.F. Amplifier by bypassing the Final Crystal Filter.
1. Halt sweep. Disconnect the LPT cable from the MSA.
2. Remove power to MSA.
3. Allow about 10 seconds for the circuits to discharge.
4. Apply power to the MSA. Connect the LPT cable to the MSA
5. Click "Continue" (not Restart).
    a. The MSA will sweep without "brains", but the Log Detector and AtoD Converter data will be valid.
6. Use a length of wire and short J2 of the IF Amplifier to J1 of the Log Detector.
     a. The Magnitude trace and the magdata bits should increase due to wide band noise increase.
     b. The actual output noise power at J2 should be -55.1 dBm (40 MHz noise bandwidth).
     c. An increase here does not necessarily indicate a problem with the Final Crystal Filter, but
        a non-increase here does indicate a problem within the IF Amplifier Module. If so,
       
go to the section, SLIM Voltage Tests and perform the paragraph, IF Amplifier Module, and
        if the voltage test passes, continue to the next test, I.F. Amplifier Signal Test.
7.
Click "Restart" button.
      
I.F. Amplifier Signal Test (assumption: J3 is input, J4 connected to J1, and J2 is output)
For this test, the following other modules must be operating correctly:
Control Board, A to D Module, Log Detector Module, Master Oscillator Module, DDS 1 Module
This test uses DDS 1 as a sweeping signal source.
1.
Make a length of wire with a 10 K ohm resistor in series.
2. Halt the sweep
3. Open Sweep Parameters Window and change:
     a. Center frequency to the center frequency of your Final Crystal Filter (10.7 MHz)
     b. Span to 10 times the bandwidth of your
Final Crystal Filter
     c. Click "OK" to close window
4. Click "Restart"
5. Click "Halt"
6. Open Special Tests Window using Menu item, "Setup"
7. Click the "DDS 1 Sweep" button. Do not close Special Tests Window
8. Click "Continue", not "Restart".
9. Use the wire and couple J3 of DDS 1 to output of IF Amplifier, J2.
     a. Trace should be the response of your Final Crystal Filter, centered in the center of the Graph.
     b. Use this trace as a reference for the next two steps.
10. Use the wire and couple J3 of DDS 1 to center of IF Amplifier, J1 (or J4).
     a. Trace should be the response of your Final Crystal Filter, centered in the center of the Graph.
     b. The Magnitude trace and the magdata bits should increase by about 20 dB.
11.
Use the wire and couple J3 of DDS 1 to input of IF Amplifier, J3.
     a. Trace should be the response of your Final Crystal Filter, centered in the center of the Graph.
     b. The Magnitude trace and the magdata bits should increase by about 40 dB.
12. A much lower gain indication would suggest a fault within the I.F. Amplifier Module
13. Close Special Tests Window
14. Halt the sweep
15. Click "Restart" button.

Coaxial Cavity Filter Test
    Your MSA can any Build Level but must be configured into the 1G/3G topology. It is extremely important that these preliminary steps are taken before this test is performed.
a. The Master Oscillator Frequency must be determined and its value entered into the Configuration Manager of the MSA Program. See web page, Initial Set-Up and Calibration for the MSA, step II. B. Master Oscillator Calibration.
2. The Final Crystal Filter center frequency must
be determined and its value entered into the Configuration Manager of the MSA Program.
3. At least a Coarse Calibration of Log Detector. Best if a Path Calibration has been performed.


Test
1. Run the MSA Program. The MSA Main Graph will open and sweep with the MSA in the Spectrum Analyzer mode.
2.  Halt the Sweep and open the Sweep Parameters Window and change:
  a. Center Frequency to 0 (MHz).
  b. Span to 40 (MHz).
  c. Steps to 400
  d. Wait to 20
3. Click "OK" to close Sweep Parameters Window.
4. Click "Restart"; then click "Halt"
5. Open Special Tests Window (under menu item "Setup")
6. Click "Cavity Filt Test" button. Leave Special Tests Window open. Close only after test is complete.
7. The Cavity Filter is swept by the frequency of PLO1 (the feed-thru of Mixer1 L to R port isolation). PLO1 is stepped in 100 KHz increments and PLO 2 will follow PLO1 at a frequency 10.7 MHz higher than PLO1. The Log Detector responds to this difference in frequency (10.7 MHz).
msascreens/cavsweep41.gif
8. The Magnitude trace will show the bandwidth response of the Cavity Filter. The frequencies displayed are offset below the actual frequencies of the Cavity Filter. That is, the center of 0M corresponds to 1013.3 MHz, the -20M corresponds to 993.3 MHz, and 20M is 1033.3 MHz. The Magnitude is totally dependent on the Isolation of Mixer 1 (L to R ports). The Magnitude should be approximately -22 dBm plus or minus a few dB.
9. Tune your Coaxial Cavity Filter for best response, with its center at "0" MHz.
10. The insertion loss of the Cavity Filter should be approximately -6 dB, +/- 2 dB.
    Note: You can halt the sweep, open the Sweep Parameters Window and change the Span to any value in 1 MHz steps between 1 MHz and 40 MHz. You must also change the Steps/Sweep to 10 times the value of the Span. This is because PLO2 is swept in 100 KHz steps. Higher "Wait (ms)" times give better results.

"Zero" Frequency Sweep
    This is the defaulted Spectrum Analyzer sweep each time the MSA software is initialized. If the "Prefs.txt" file is never changed, the MSA will always open with this set-up. I suggest it never be changed, as this is a good "health" test every time the MSA program is run.
1. Run the MSA Program.
2. The MSA Main Graph will open.
3. It will sweep with the MSA in the Spectrum Analyzer mode
, 1G Band.
4. The Sweep Width will be 10 times the bandwidth of the Resolution Filter in Path 1.
5. The Magnitude trace is the Final Resolution Filter response, and is precisely centered at "0 MHz".
6. The actual signal is the PLO 1 frequency, converted to the final I.F. by Mixer 2.
7. The peak Magnitude level depends on internal gain/loss characteristics of each individual MSA.

    a. With a 50 ohm load on the input of the
Verification MSA,
        * the calibrated MSA measures -22.6 dBm on the Magnitude scale
        * the un-calibrated MSA measures -28.4 dBm on the Magnitude scale
        * the Magdata (bit count in the Variables Window) is 25025 (bits)
    b. With nothing on the input of the Verification MSA,
        * the calibrated MSA measures -26.3 dBm
        * the un-calibrated MSA measures -32.2 dBm on the Magnitude scale
        * the Magdata (bit count in the Variables Window) is 23984 (bits)
    c. These load variations are due to the reflective mismatch presented to the input of Mixer 1
8. Other MSA levels will differ (as much as +/- 15 dB), but will always be repeatable, if healthy.

DDS 1 Generator Test
     This performance test utilizes the spare output of DDS 1 as a known power level signal source to verify the condition of the MSA. This test is especially useful for the Basic MSA, where no other frequency standards are available. The spare output of DDS 1 can be used as a stable frequency source to "self test" the MSA.
1. Connect J3 of DDS 1 to the input of the MSA
    a. The output power level of DDS 1 is -9.2 dBm, +/- .2 dB, at 10.7 MHz
    b. If this is expected to saturate the MSA, add an appropriate attenuator, 10 or 20 dB.

2. Run the MSA program.
3. Halt the Sweep
4. Open the Sweep Parameters Window and change:
    a. Center Frequency to the center frequency of the DDS 1 Crystal Filter, nominally, 10.7 (MHz)
        * For the Verification MSA and the following example, it is 10.695 MHz.
    b. Span to 1 (MHz)
    c. Wait to 50
    d. Magnitude Video to Narrow. If manual switch, select Narrow.
5. Click "OK" to close
Sweep Parameters Window.
6. Click "Restart".
msascreens/dds1genwide.gif
7. The Magnitude trace will exhibit a
low level alias frequency and a higher level fundamental.
    a. Alias frequencies can be calculated as: N*Master Osc +/- DDS 1, where N= whole number
    b. The low level alias frequency (shown at Marker L)
        * is 16 * 64 MHz - 10.7 MHz = 1013.3 MHz,
        * which is the same as the First IF, the Coaxial Cavity Filter.
        * This frequency is not "mixed" in Mixer 1. It passes through due to imperfect mixer isolation.
        * The power level depends on the actual power of the alias and the Mixer 1
            I port to R port isolation. No two mixers will be the same, so, other MSA's will vary.
            The level in the Verification MSA shows -69.19 dBm, but there is a 10 dB pad in line,
            making the actual level -59.2 dBm.
        * This isolation effect can be seen by shorting Mixer 1, ADE-11X, pin 2 to pin 3. The level
            will increase, substantially.
    c. The higher level fundamental frequency is the signal of interest for this test, and
        * will not be centered at exactly 10.7 MHz.
        * The actual frequency is the DDS steering frequency,
        * and will be within the bandwidth of the DDS Crystal Filter.

        * In the Verification MSA, it is centered at 10.697 MHz in this test.
msascreens/dds1gennarrow.gif
8. This signal at J3 of DDS 1 should be -9.2 dBm, +/- .2 dBm.
        *
With the calibrated Verification MSA, it is measuring -19.34 dBm, however there is a 10 dB
           attenuator in line, making the actual level, -9.3 dBm.
        * Marker 1 is placed above the low level alias frequency, which is 1013.3 MHz. This interference
           could be removed by using a low pass filter between the DDS and the MSA input.
9. Higher alias frequencies (image frequencies) are usable to several GHz. For example, the following
    is the alias at 2xClock + 10.7 MHz = 2*64 + 10.7 = 138.7 MHz. This configuration has a 300 MHz low pass filter in line to suppress the 1013.3 MHz alias.
msascreens/dds1genalias2c.gif

MSA Frequency Range Test
    The main purpose of this paragraph is to test the Frequency Range of the MSA/Tracking Generator/VNA. This paragraph is used only for the MSA with the Tracking Generator option or VNA extension. Basic MSA users may skip this paragraph.
Test
1. Run the MSA Program. The MSA Main Graph will open and sweep with the MSA in the Spectrum Analyzer mode.
2. Halt the Sweep. Connect a coaxial test cable from the Tracking Generator output to the MSA input.
3. Change Mode
     * for MSA/TG, change Mode to Spectrum Analyzer with Tracking Generator.
     * for MSA/VNA, change Mode to VNA-Transmission Mode.
4. Halt the Sweep
5. Open the Sweep Parameters Window and change:
  a. Center Frequency to 600 (MHz)
  b. Span to 1200 (MHz)
  c. Wait to 50
6. Click "OK" to close
Sweep Parameters Window.
7. Click "Restart".
msascreens/freqrangetest.gif
8. The Magnitude trace should be about -11 dBm, +/- 2 dB from 0 MHz to at least 1000 MHz. Somewhere above that, the Magnitude will fall off where either PLO 1 or PLO 3 reaches its frequency limit.
9. The Phase trace may start at any value (in degrees), and have more or fewer "sawtooths" over the sweep range. The Phase shift vs. frequency depends on the length of the test cables and the internal coaxial cables.
10.  Make note of the maximum frequency where the Magnitude and Phase traces quit. This is the highest frequency the MSA/VNA will measure, in the 1G Band. This Graph shows that the upper limit of the Verification MSA/VNA is 1035 MHz.


(...to be continued) I plan to add more information as time progresses. New updates will be noted at the top of the page.